<p>Piper Companies is looking for a Substrate Design Engineer to join a cutting-edge start up onsite Monday through Friday near San Jose, CA. The ideal Substrate Design Engineer will lead the physical layout of advanced multi-die substrates that integrate multiple chiplets into a high-density, high-performance package.</p> <p>Responsibilities for the Substrate Design Engineer:</p> <ul> <li>Lead the physical layout of complex multi-die substrates while supporting chiplet-based integration. </li><li>Collaborate with package integration, signal/power integrity, and mechanical teams to ensure successful layout implementation. </li><li>Drive routing feasibility and co-design alignment with floor planning, mechanical, and system constraints. </li><li>Own the full layout process, ensuring performance, manufacturability, and design quality. </li><li>Use industry-standard tools like Siemens Xpedition and Cadence Allegro APD to execute and refine substrate designs. </li></ul> <p>Qualifications for the Substrate Design Engineer:</p> <ul> <li>8+ years of experience in substrate layout design for advanced packaging. </li><li>Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance. </li><li>Strong background in physical layout and collaboration with ASIC, signal, and power teams. </li><li>Proficient in Siemens Xpedition and Cadence Allegro APD </li><li>Bachelor's degree in Electrical Engineering preferred. </li></ul> <p>Compensation/Benefits for the Substrate Design Engineer:</p> <ul> <li>Salary Range: $200,000 - $260,000 annually </li><li>Comprehensive Benefits: Medical, Dental, Vision, 401K, PTO, Sick Leave (if required by law), and Holidays </li></ul> <p>This job opens for applications on 3/25/2026. Applications for this job will be accepted for at least 30 days from the posting date.</p> <p>Keywords: Package Layout, Substrate Design, Multi-Die Integration, Chiplet Packaging, Package Design, Siemens Xpedition, Cadence Allegro APD, Semiconductor Layout, ASIC, packaging technology, Package Design, Package Design Engineer</p> <p>#LI-BR1</p> <p>#LI-ON SITE</p>